Tuesday, December 30, 2008

systemverilog wordfile

copied from http://avm-users.googlegroups.com/web/systemverilog.txt?hl=en&gsc=Lb4u6AsAAADWzOiV2TvclJOPyNlia6Gs
/L20"Verilog 1364-2001" Line Comment = // Block Comment On = /* Block Comment Off = */ String Chars = " File Extensions = SV SVL/Delimiters = ~!@%^&*()-+=|\/{}[]:;"<> , .?#/Function String = "%[a-z0-9]+[ ^t]+[a-z_0-9]+[ ^t]+("
/Indent Strings = "begin" "fork" "specify" "config"
/Unindent Strings = "end" "join" "join_any" "join_none" "endspecify" "endconfig"
/C1"Keywords"
alias always always_comb always_ff always_latch and assert assign assume automatic 
before begin bind bins binsof bit break buf bufif0 bufif1 byte
case casex casez cell chandle class clocking cmos config const constraint context continue cover covergroup coverpoint cross
deassign default defparam design disable dist do
edge else end endcase endclass endclocking endconfig endfunction endgenerate endgroup endinterface endmodule endpackage endprimitive endprogram endproperty endspecify endsequence endtable endtask enum event expect export extends extern
final first_match for force foreach forever fork forkjoin function
generate genvar
highz0 highz1
if iff ifnone ignore_bins illegal_bins import incdir include initial inout input inside instance int integer interface intersect join
join_any join_none
large liblist library local localparam logic longint
macromodule matches medium modport module
nand negedge new nmos nor noshowcancelled not notif0 notif1 null
or output
package packed parameter pmos posedge primitive priority program property protected pull0 pull1 pulldown pullup pulsestyle_onevent pulsestyle_ondetect pure
rand randc randcase randsequence rcmos real realtime ref reg release repeat return rnmos rpmos rtran rtranif0 rtranif1
scalared sequence shortint shortreal showcancelled signed small solve specify specparam static string strong0 strong1 struct super supply0 supply1
table tagged task this throughout time timeprecision timeunit tran tranif0 tranif1 tri tri0 tri1 triand trior trireg type typedef
union unique unsigned use
var vectored virtual void
wait wait_order wand weak0 weak1 while wildcard wire with within wor
xnor xor
/C2"System"
** 'b 'B 'o 'O 'd 'D 'h 'H 'sb 'sB 'so 'sO 'sd 'sD 'sh 'sH 'Sb 'SB 'So 'SO 'Sd 'SD 'Sh 'SH
** _
$assertkill $assertoff $asserton $async$and$array $async$nand$array $async$or$array $async$nor$array $async$and$plane $async$nand$plane $async$or$plane $async$nor$plane
$bits $bitstoreal $bitstoshortreal 
$cast $comment $countdrivers $countones
$date $dimensions $display $displayb $displayh $displayo $dist_chi_square $dist_erlang $dist_exponential $dist_normal $dist_poisson $dist_t $dist_uniform $dumpall $dumpflush $dumpfile $dumplimit $dumpoff $dumpon $dumpports $dumpportsall $dumpportsflush $dumpportslimit $dumpportsoff $dumpportson $dumpvars
$enddefinitions $error $exit
$fatal $fdisplay $fdisplayf $fdisplayb $fdisplayh $fdisplayo $fell $feof $ferror $fflush $fgetc $fgets $finish $fopen $fmonitor $fmonitorb $fmonitorf $fmonitorh $fmonitoro $fclose $fread $fscanf $fseek $fsscanf $fstrobe $fstrobeb $fstrobef $fstrobeh $fstrobeo $ftell $fullskew $fwrite $fwriteb $fwritef $fwriteh $fwriteo 
$get_coverage $getpattern
$high $hold $history
$increment $incsave $info $input $isunbounded $isunknown $itor
$key 
$left $list $load_coverage_db $log $low 
$monitor $monitorb $monitorh $monitoro $monitoron $monitoroff 
$nochange $nokey $nolog $onehot $onehot0
$past $period $printtimescale
$q_add $q_exam $q_full $q_initialize $q_remove $q_random
$random $readmemb $readmemh $realtime $realtobits $recovery $recrem $removal $reset $reset_count $reset_value $restart $rewind $right $root $rose $rtoi
$sampled $save $scale $scope $sdf_annotate $set_coverage_db_name $setup $setuphold $sformat $shortrealtobits $showvariables $showscopes $showvars $signed $size $skew $sreadmemb $sreadmemh $sscanf $stable $stime $stop $strobe $strobeb $strobeh $strobeo $swrite $swriteb $swriteh $swriteo $sync$and$array $sync$nand$array $sync$or$array $sync$nor$array $sync$and$plane $sync$nand$plane $sync$or$plane $sync$nor$plane
$test$plusargs $time $timeformat $timescale $timeskew $typename $typeof
$ungetc $unit $unpacked_dimensions $unsigned $upscope $urandom $urandom_range
$value$plusargs $var $vcdclose $version
$warning $width $write $writeb $writeh $writeo $writememb $writememh

/C3"Operators"
->
+:
-:
@
@*
*>
,
;
.*
{
}
+
-
// /
*
**
%
>
>=
>>
>>>
<
<=
<<
<<<
!
!=
!==
&
&&
|
||
=
==
===
^
^~
~
~^
~&
~|
?
:
|->
|=>
/C4"Directives"
** `
`begin_keywords
`accelerate `autoexepand_vectornets
`celldefine
`default_nettype `define `default_decay_time `default_trieg_distributed `default_trireg_strength `delay_mode_distributed `delay_mode_path `delay_mode_unit `delay_mode_zero
`else `elsif `endcelldefine `endif `end_keywords `endprotect `endprotected `expand_vectornets
`file
`ifdef `ifndef `include
`line
`noaccelerate `noexpand_vectornets `noremove_gatenames `noremove_netnames `nounconnected_drive
`pragma `protect `protected
`remove_gatenames `remove_netnames `resetall
`timescale
`unconnected_drive `undef `uselib


/C5"DelaysAndParameters"
#
##

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